The present invention relates to an apparatus for analyzing and synthesizing human speech.
An apparatus for analyzing and synthesizing human speech requires a large capacity of storage for memorising analyzed data of human speech. In addition, storages used for this purpose must be accessible at a high speed for realizing real time processing of human speech. Hitherto, there have been used static RAMs whose peripheral circuits are easily configured. However, when a time length of human speech to be analyzed and synthesized is increased, the capacity of storage required therefor is dramatically increased. Because of high cost of the static RAM, when the storage capacity is increased, the cost of the static RAM will raise the cost of the apparatus for analyzing and synthesizing human speech.
On the other hand, since dynamic RAMs are inexpensive as compared with static RAMs, they are suitable for use in analyzing and synthesizing human speech when high speed and large capacity storages are needed. However, with dynamic RAMs, refresh operation is always required. In addition, the apparatus for analyzing and synthesizing human speech requires real time operation. It is necessary to analyze and synthesize human speech even during refresh cycle. Accordingly, it is required to provide a peripheral circuit which effects complicated timing control in order to use dynamic RAMs in an apparatus for analyzing and synthesizing human speech.